1. Field of the Invention
This invention relates to trenched transistors (both FET and bipolar) and more specifically to a trenched DMOS transistor.
2. Description of Related Technology
Double-diffused MOS (DMOS) transistors are a type of MOSFET in which diffusions form the active transistor regions. It is known to form such transistors in a silicon substrate using a trench lined with a thin oxide layer and filled with conductive polysilicon to form the transistor gate structure. These transistors are typically used for power applications, such as high-current switching applications.
FIG. 1 illustrates a conventional, hexagonally-shaped trench DMOS structure 21. Structure 21 includes an N+ substrate 23, on which is grown a lightly doped epitaxial layer (N) 25 of a predetermined depth d.sub.epi. Within epitaxial layer 25, a body region 27 of opposite conductivity (P, P+) is provided. Except in a certain central region that will be discussed shortly, the P body region 27 is substantially planar and lies a distance d.sub.min below the top surface of epitaxial layer 27. Another covering layer 28 (N+) overlying most of the body region 25 serves as the source of structure 21.
A hexagonally-shaped trench 29 is provided in epitaxial layer 25, opening toward the top and having a predetermined depth d.sub.tr. Trench 29 is lined with an oxide insulating layer 30 and filled with doped polysilicon. The trench 29 associated with a transistor cell defines a cell region 31 that is also hexagonally shaped in horizontal cross-section. Within cell region 31, the body region rises to the top surface of epitaxial layer 25 and forms an exposed pattern 33 in a horizontal cross section at the top surface of the cell region.
The central exposed portion 33 of the body region is more heavily doped (P+) than the substantially planar remainder of the body region. Further, this central portion of the body region (i.e., deep diffusion region 27C) extends below the surface of epitaxial layer 25 to a depth d.sub.max that is greater than the trench depth d.sub.tr. This is very important because any source-to-drain voltage breakdown is forced away from the trench surfaces (e.g., the portions of gate oxide 30 adjacent body region 27) and into the bulk of N+ substrate 23. Thus, deep diffusion region 27C prevents destructive breakdown of the gate oxide dielectric.
As discussed above, the use of deep diffusion region 27C provides a significant advantage in protecting the gate oxide. Unfortunately, the deeper a diffusion, the greater the extent of that diffusion's lateral encroachment of neighboring structures. Deep diffusions consequently require a large amount of die area, leading to inefficient device packing and increased device cost. Hence, there is a need for a structure that provides the advantages of a trenched DMOS transistor with deep diffusion regions while minimizing the area required to provide deep diffusion regions of sufficient depth.